Innovative Copper Seed Provides Bottom-up Fill That Reduces The Pre-Electroplating Aspect Ratio
SAN JOSE, Calif., July 13 /PRNewswire-FirstCall/ -- Novellus Systems (Nasdaq: NVLS) announced today that it has developed an advanced Hollow Cathode Magnetron (HCM(R)) IONX(TM) PVD copper seed process that will enable copper interconnects below the 2xnm technology node. The breakthrough will allow the company's highly-productive and proven HCM PVD technology on the INOVA(R) platform to continue to be used for barrier and seed thin film deposition, avoiding the migration to less-productive and costly ALD or CVD approaches.
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For the past ten years, PVD copper barrier/seed and copper electrochemical deposition have been the dominant technologies used in building logic devices. Memory manufacturers are now transitioning to copper interconnects as well, for reasons driven by technology and cost. In terms of technology, the lower RC interconnect delay gained when using copper equates to higher speed memory chips. From the cost perspective, copper DRAM and Flash devices are more manufacturable than their aluminum counterparts since the copper damascene process flow requires fewer production steps and utilizes deposition equipment with higher throughputs.
As the critical dimensions (CD) of via and trench structures decrease with advanced technology nodes, PVD deposition technology becomes limited by its lack of conformality. Copper seed requirements generally call for at least 100 Angstroms of film thickness in the field to minimize the electroplating terminal effect, as well as >20 Angstroms of continuous film within the structure to ensure void-free copper fill. With 2xnm devices already limiting the top CD to approximately 220 Angstroms, obtaining sufficient step coverage using conventional and even ionized PVD copper seed will be a challenge. Excessive overhang at the top of the feature will lead to a reduction in the size of the opening, also known as 'pinch-off,' as shown in Figure 1.
