Next-Generation Cadence Technology to Expedite Advanced Technology Development and Ease Legacy Design Reuse

TAIPEI, TAIWAN -- (Marketwire) -- 07/29/09 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global design innovation, today announced that Industrial Technology Research Institute (ITRI), a non-profit organization that serves to strengthen the technological competitiveness of Taiwan, has adopted Cadence® C-to-Silicon Compiler for its RTL design. As a result, Cadence C-to-Silicon Compiler is significantly increasing ITRI's design capabilities and shortening development time for its PAC Duo project while increasing engineering productivity.

Cadence C-to-Silicon Compiler is next-generation high-level synthesis for transaction-level model (TLM)-driven design and verification. By adopting Cadence C-to-Silicon Compiler, ITRI significantly increased design productivity and eased legacy design reuse by starting design above the RTL-level of abstraction, using SystemC TLM. ITRI's first project using C-to-Silicon Compiler showed approximately 12% and 10% improvements respectively in power consumption and area relative to hand-coded RTL, at the same clock-speed. These results were achieved with 70% less engineering effort than manual design, or more than a 3x increase in productivity.

"As Taiwan's premiere technology research institute, ITRI's mission is to expedite development of new industrial technology as well as aid in the process of upgrading industrial technology techniques," said Dr. Cheng-Wen Wu, general director of the SoC Technology Center, ITRI. "With the help of Cadence C-to-Silicon Compiler, the time we spent on generating and verifying RTL was significantly reduced, from 12 months to only four months in a direct memory access controller (DMAC) pilot project. We are now looking forward to using C-to-Silicon on our next SoC tapeout."

C-to-Silicon Compiler accelerates development and verification of RTL code for both control and datapath designs, starting from a high level of abstraction. Its revolutionary capabilities help hardware architects and RTL designers rapidly explore micro-architectural options and optimize results, execute engineering changes easily, and maximize its design reuse. The proven capabilities also enable faster verification and earlier hardware-software co-design.

"We are very pleased to see ITRI's success as the institute plays a key role in driving Taiwan's semiconductor industry," said Ran Avinun, Product Marketing Group Director of System Design and Verification, at Cadence. "One of the key missions of Cadence is to help customers optimize their business efficiency and effectiveness by overcoming a range of technical and economic hurdles, especially during this economic downturn. We continue to invest in technology innovation to help increase the productivity of our customers."

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

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