Oct. 29, 2009 (PR Newswire) --

TOKYO, Oct. 29 /PRNewswire/ -- Xilinx K.K., the Japanese subsidiary of Xilinx, Inc. (Nasdaq: XLNX), today announced that the National Institute of Advanced Industrial Science and Technology, Japan (AIST) selected Virtex®-5 and Spartan®-3A FPGA families for its SASEBO-GII boards for side channel attack standard evaluation and partial reconfiguration. The SASEBO-GII boards will enable the development and evaluation of performance and security of cryptographic circuits to contribute to the international standardization of hardware security.

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The SASEBO-GII board uses Virtex-5 FPGAs, which has about four to seven times larger logic area than the Virtex-II FPGA used in the SASEBO-G generation, and therefore enables the evaluation of complex circuits that could not be implemented previously. Greater integration has allowed AIST to reduce board surface area to a third of its former size and enabled considerable miniaturization. The Virtex-5 device's partial reconfiguration capabilities will enable the research and development of highly-advanced hardware security systems. The SASEBO-GII board is expected to serve as the standard for carrying out cryptographic hardware experiments and for international programs involving hardware security evaluation.

With advances in digital information devices and the spread of broadband networks, cryptographic algorithms are being widely used to prevent the leakage or falsification of data. However, improper implementation of the algorithms can expose entire security systems to the risk of attacks. The ISO/IEC 19790 and 24759 standards and the FIPS 140-2 standard issued by the U.S. National Institute of Standards and Technology (NIST) were established as a means for third party testing and validation of cryptographic modules. Japan's Information-Technology Promotion Agency (IPA) also operates a Japan Cryptographic Module Validation Program (JCMVP) that conforms to these standards.

These standards do not, however, address side channel attacks, which are a new form of attack that exploit confidential information derived from cryptographic module timing information, power consumption, electromagnetic leaks and other sources. NIST is currently developing FIPS 140-3 as a standard that addresses such attacks, and the ISO/IEC standard is also expected to be revised. SASEBO-GII is the latest version of the FPGA board that AIST has been researching and developing since fiscal 2006 as a standard testing platform for working out the standards.

The SASEBO-GII board is the third generation of SASEBO boards to use Xilinx FPGAs.